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ICS9LPRS511YGLF-T 데이터시트(PDF) 4 Page - Renesas Technology Corp

부품명 ICS9LPRS511YGLF-T
상세설명  Low Power Programmable Timing Control Hub™ for P4™ processor
PDF  20 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ICS9LPRS511YGLF-T 데이터시트(HTML) 4 Page - Renesas Technology Corp

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4
Integrated
Circuit
Systems, Inc.
ICS9LPRS511
Advance Information
1137—09/05/08
General Description
ICS9LPRS511 follows the Intel CK505-compliant clock specification. This clock synthesizer provides a single chip solution for
next generation P4 Intel processors and Intel chipsets. ICS9LPRS511 is driven with a 14.318MHz crystal.
Fixed PLL
Frequency
Dividers
PLL
Array
Programmable
Frequency
Divider
Array
STOP
Logic
48MHz, USB
X1
X2
XTAL
SDATA
SCLK
FSLA
FSLB
FSLC
VttPwrgd/WOL_STOP#
Control
Logic
REF0
CPUCLKT (1:0)
CPUCLKC (1:0)
SATACLKT
SATACLKC
PCICLK (4:0)
PCIEXT(8:1)
DOTCLKT96/PCIEXT0
DOTCLKC96/PCIEXC0
PCIEXC(8:1)
25MHz
Reset#
DOC (1:0)
SEL24_48#
SELRSET
24_48MHz
RLATCH
GSEL
24.576MHz
Block Diagram



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