TL7660CD datasheet(10/19 Pages) TI

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Output Ripple

–V+

Paralleling Devices

TL7660

"1"

TL7660

"n"

V+

TL7660

CMOS VOLTAGE CONVERTER

SCAS794 – JUNE 2006

APPLICATION INFORMATION (continued)

ESR also affects the ripple voltage seen at the output. The total ripple is determined by two voltages, A and B,

as shown in Figure 4. Segment A is the voltage drop across the ESR of C2 at the instant it goes from being

charged by C1 (current flow into C2) to being discharged through the load (current flowing out of C2). The

magnitude of this current change is 2

× I

OUT, hence the total drop is 2 × IOUT × eSRC2 V. Segment B is the

voltage change across C2 during time t2, the half of the cycle when C2 supplies current to the load. The drop at

B is IOUT × t2/C2 V. The peak-to-peak ripple voltage is the sum of these voltage drops:

VRIPPLE ≈ (1/(2fPUMPC2) + 2(ESRC2)) × IOUT

Again, a low ESR capacitor results in a higher performance output.

Figure 4. Output Ripple

Any number of TL7660 voltage converters may be paralleled to reduce output resistance (see Figure 5). The

reservoir capacitor, C2, serves all devices, while each device requires its own pump capacitor, C1. The resultant

output resistance would be approximately:

ROUT = ROUT (of TL7660)/n (number of devices)

Figure 5. Paralleling Devices

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