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IDT70P9268 데이터시트(PDF) 15 Page - Renesas Technology Corp |
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IDT70P9268 데이터시트(HTML) 15 Page - Renesas Technology Corp |
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15 / 24 page ![]() 15 of 23 November 16, 2007 IDT70P9268 Very Low Power 16K x 16 Synchronous Mobile Multimedia Interface (M2I) Dual Port Static RAM Industrial Temperature Range Timing Waveform of Non-Mux’d Port Read-to-Write-to-Read (OE Controlled) NOTES: 1. Output state (High, Low, or High-impedance) is determined by the previous cycle control signals. 2. CE and ADS = VIL; CNTEN, and CNTRPT = VIH. "NOP" is "No Operation". 3. Addresses do not have to be accessed sequentially since ADS = VIL constantly loads the address on the rising edge of the CLK; numbers are for reference use only. ADDRESS DATAOUT CLK Dn+2 tSA tHA An READ An+1 An+2 An+3 An+4 An+5 Qn+4 WRITE READ tSC tHC tSD tHD Qn tCH tCL tCYC tSB tHB tSW tHW tSW tHW tCD tCKHZ CE R/W DATA IN Dn+3 tOHZ (1) OE UB / LB |
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