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CYT4DNJBJS 데이터시트(PDF) 35 Page - Infineon Technologies AG

부품명 CYT4DNJBJS
상세설명  TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual
PDF  209 Pages
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제조업체  INFINEON [Infineon Technologies AG]
홈페이지  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

CYT4DNJBJS 데이터시트(HTML) 35 Page - Infineon Technologies AG

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Datasheet
35
002-24601 Rev. *I
2023-02-14
TRAVEO™ T2G 32-bit Automotive MCU
Based on Arm® Cortex®-M7 dual
Package pin list and alternate functions
P19.2
U7
HSIO_STDLN
P19.3
V7
HSIO_STDLN
P19.4
W7
HSIO_STDLN
P19.5
Y7
HSIO_STDLN
P19.6
U8
HSIO_STDLN
P19.7
V8
HSIO_STDLN
P20.0
W8
HSIO_STDLN
P20.1
Y8
HSIO_STDLN
P20.2
U9
HSIO_STDLN
P20.3
V9
HSIO_STDLN
P20.4
W9
HSIO_STDLN
P20.5
Y9
HSIO_STDLN
P20.6
U10
HSIO_STDLN
P20.7
V10
HSIO_STDLN
P21.0
W10
HSIO_STDLN
P21.1
Y10
HSIO_STDLN
P21.2
U11
HSIO_STDLN
P21.3
V11
HSIO_STDLN
P23.0
C1
HSIO_ENH
P23.1
C2
HSIO_ENH
P23.2
D1
HSIO_ENH
P23.3
D2
HSIO_ENH
P23.4
D3
HSIO_ENH
P24.0
G1
HSIO_ENH_PDIFF[30]
P24.1
G2
HSIO_ENH_PDIFF[30]
P25.0
E1
HSIO_ENH
P25.1
E2
HSIO_ENH
P25.2
E3
HSIO_ENH
P25.3
F1
HSIO_ENH
P25.4
F2
HSIO_ENH
P25.5
F3
HSIO_ENH
P26.0
H1
HSIO_ENH
P26.1
H2
HSIO_ENH
P26.2
J1
HSIO_ENH
P26.3
J2
HSIO_ENH
P26.4
J3
HSIO_ENH
P27.0
M1
HSIO_ENH_PDIFF[30]
P27.1
M2
HSIO_ENH_PDIFF[30]
P28.0
K1
HSIO_ENH
P28.1
K2
HSIO_ENH
P28.2
K3
HSIO_ENH
Table 11-1
Pin selector and alternate pin functions in DeepSleep (DS) Mode, Analog, Smart I/O[36] (continued)
Name
Package
I/O Type
DeepSleep Mapping
Analog/HV
Smart I/O
327-BGA
HCon#0
HCon#29[31]
HCon#30
Pin
DS#5[32, 33]
DS#6
Note
30.To use SMIF differential clock pin as GPIO output, it is recommended to disable the other associated I/O pin. Refer to the device
Architecture TRM for more information.



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