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CYT4DNJBJS 데이터시트(PDF) 164 Page - Infineon Technologies AG |
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CYT4DNJBJS 데이터시트(HTML) 164 Page - Infineon Technologies AG |
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164 / 209 page ![]() Datasheet 164 002-24601 Rev. *I 2023-02-14 TRAVEO™ T2G 32-bit Automotive MCU Based on Arm® Cortex®-M7 dual Electrical specifications Figure 26-27 RMII timing diagram Figure 26-28 RGMII Tx timing diagram 1 REF_CLK RXD, RX_CTL, RX_ER 1: RMII reference clock cycle = 1/fREF_CLK 2: Data setup to REF_CLK rising edge = tSU 3: Data hold from REF_CLK rising edge = tHOLD 4: Data output delay from REF_CLK_rising edge = tTXOUT 2 3 0.8 V 2.0 V 4 0.8 V 2.0 V TXD, TX_CTL 1.4 V 1 RX_CLK, TX_CLK TX_CTL, RX_CTL, TXD, RXD 1: TX_CLK and RX_CLK clock cycle = 1/fCYC 2: Data to clock output skew = tSKEWT 100 % 50 % 0 % 100 % 50 % 0 % 2 2 2 2 |
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