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PIC24FJ64GA006 데이터시트(PDF) 73 Page - Microchip Technology |
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PIC24FJ64GA006 데이터시트(HTML) 73 Page - Microchip Technology |
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73 / 232 page ![]() © 2006 Microchip Technology Inc. Preliminary DS39747C-page 71 PIC24FJ128GA FAMILY REGISTER 6-12: IEC2: INTERRUPT ENABLE CONTROL REGISTER 2 Upper Byte: U-0 U-0 R/W-0 U-0 U-0 U-0 R/W-0 U-0 — —PMPIE — — —OC5IE — bit 15 bit 8 Lower Byte: R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 R/W-0 R/W-0 IC5IE IC4IE IC3IE — — — SPI2IE SPF2IE bit 7 bit 0 bit 15-14 Unimplemented: Read as ‘0’ bit 13 PMPIE: Parallel Master Port Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 12-10 Unimplemented: Read as ‘0’ bit 9 OC5IE: Output Compare Channel 5 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 8 Unimplemented: Read as ‘0’ bit 7 IC5IE: Input Capture Channel 5 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 6 IC4IE: Input Capture Channel 4 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 5 IC3IE: Input Capture Channel 3 Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 4-2 Unimplemented: Read as ‘0’ bit 1 SPI2IE: SPI2 Event Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled bit 0 SPF2IE: SPI2 Fault Interrupt Enable bit 1 = Interrupt request enabled 0 = Interrupt request not enabled . Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
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