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AS1322

Data Sheet

Pin Descriptions

4 Pin Assignments

Figure 2. Pin Assignments (Top View)

Pin Descriptions

Table 2. Pin Descriptions

Pin

Name

Pin

Number

Description

SW

1

trace lengths as short and wide as is practical to reduce EMI and voltage

overshoot. If the inductor current falls to zero, or pin SHDNN is low, an

internal 100

minimize EMI.

Note: An optional Schottky diode can be connected between this pin and

GND

2

Signal and Power Ground. Provide a short, direct PCB path between this

pin and the negative side of the output capacitor(s).

FB

3

divider tap to this pin. The output voltage can be adjusted from 2.5 to 5V by:

SHDNN

4

Shutdown Pin. Logic controlled shutdown input.

1 = Normal operation, 1.2MHz typical operating frequency.

0 = Shutdown; quiescent current <1µA. If SHDNN is undefined, pin SW may

ring.

1M

Ω pull-up resistor.

5

Output Voltage Sense Input and Drain of the Internal PMOS

short and wide as is practical. Due to the ESD protection diode of the

shutdown.

6

limited by the output power level and the internal series resistance of the

supply.

1

SW

AS1322

2

GND

3

FB

4 SHDNN