10/18

VNQ600AP

LOAD DUMP PROTECTION

same applies if the device will be subject to transients on

ISO T/R 7637/1 table.

µC I/Os PROTECTION:

If a ground protection network is used and negative

in line to prevent the

µC I/Os pins to latch-up.

The value of these resistors is a compromise between the

leakage current of

µC and the current required by the

HSD I/Os (Input levels compatibility) with the latch-up limit

of

µC I/Os.

Calculation example:

5k

Ω ≤ R

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

3000

3500

4000

4500

5000

5500

6000

6500

min.Tj=-40°C

max.Tj=-40°C

min.Tj=25...150°C

max.Tj=25...150°C

typical value