24/43

XC9147/XC9148 Series

■

NOTES ON USE

●

Instructions of pattern layouts.

Especially noted in the pattern layout are as follows.

Please refer to the reference pattern layout on the next page.

(a) Wire the large current line using thick, short connecting traces.

This makes it possible to reduce the wire impedance, which is expected to reduce noise and improve heat dissipation.

If the wire impedance of the large current line is large, it may cause noise or the IC to not operate normally.

Especially when the noise is large, the current limit function and the integral latch function may not work.

(b) Place the input capacitance CIN, output capacitance CL, inductor L and IC which the large current flows on the same

surface. If they are placed on both sides, a large current will flow through Via, which has high impedance, it may cause

noise and the IC may not operate normally.

(c) Please mount each external component as close to the IC as possible.

Especially place the output capacitance CL near the IC and connect it with as low impedance as possible.

If the output capacity CL and IC are too far apart, it may cause noise or the IC may not operate normally.