| 전자부품 데이터시트 검색엔진 |
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ICS85214 데이터시트(PDF) 9 Page - Renesas Technology Corp |
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ICS85214 데이터시트(HTML) 9 Page - Renesas Technology Corp |
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9 / 16 page ![]() ICS85214 LOW SKEW, 1-TO-5, DIFFERENTIAL-TO-HSTL FANOUT BUFFER IDT™ / ICS™ HSTL FANOUT BUFFER 9 ICS85214AG REV. B JUNE 3, 2016 Recommendations for Unused Input and Output Pins Inputs: LVCMOS Control Pins All control pins have internal pull-ups or pull-downs; additional resistance is not required but can be added for additional protection. A 1k resistor can be used. CLK/CLK INPUTS For applications not requiring the use of the differential input, both CLK and CLK can be left floating. Though not required, but for additional protection, a 1k resistor can be tied from CLK0 to ground. CLK INPUT For applications not requiring the use of a clock input, it can be left floating. Though not required, but for additional protection, a 1k resistor can be tied from the CLK input to ground. Outputs: HSTL Outputs All unused HSTL outputs can be left floating. We recommend that there is no trace attached. Both sides of the differential output pair should either be left floating or terminated. Schematic Example Figure 4 shows a schematic example of the ICS85214. In this example, the input is driven by an IDT HiPerClockS HSTL driver. The decoupling capacitors should be physically located near the power pin. For ICS85214, the unused clock outputs can be left floating. Figure 4. ICS85214 HSTL Buffer Schematic Example Zo = 50 Ohm R9 50 R11 1K U1 ICS85214 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 20 19 18 17 Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 GND CLK_SEL nc nCLK CLK SCLK VDDO nCLK_EN VDD nc 3.3V Zo = 50 Ohm R1 50 C2 0.1u Zo = 50 R4 50 R7 50 LVHSTL Driver R12 1K R10 50 R3 50 Zo = 50 C1 0.1u 1.8V Zo = 50 + - + - Zo = 50 Zo = 50 + - R8 50 Zo = 50 1.8V R2 50 |
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