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DFS04M 데이터시트(PDF) 1 Page - STMicroelectronics |
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DFS04M 데이터시트(HTML) 1 Page - STMicroelectronics |
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1 / 42 page ![]() 1/42 AN1262 APPLICATION NOTE May 2001 1 FLYBACK BASICS Flyback operation will be illustrated with reference to the basic circuit and the waveforms of fig. 1. It is a two- step process. During the ON-time of the switch, energy is taken from the input and stored in the primary winding of the flyback transformer (actually, two coupled inductors). At the secondary side, the catch diode is reverse- biased, thus the load is being supplied by the energy stored in the output bulk capacitor. Figure 1. Flyback Topology and associated waveforms. Q CLOCK Ip Is Vdrain Vin n •Vout DCM operation Q CLOCK Ip Is Vdrain ∆Ip CCM operation Q CLOCK Ip Is Vdrain TRANSITION Vin ISOLATED FEEDBACK Lp Vout Is L6590 L6590D L6590A Clock + - DRAIN GND 1 1/100 S R Q Max. Duty cycle OSCILLATOR Driver Rsense OCP + - 0.5 V + - E/A 2.5 V VFB COMP FREQUENCY COMPENSATION Vcc LEB Vac Ls n:1 Ip PWM Clock by Claudio Adragna OFFLINE FLYBACK CONVERTERS DESIGN METHODOLOGY WITH THE L6590 FAMILY The design of flyback converters is quite a demanding task that requires SMPS engineers to cope with sev- eral problem areas such as magnetics, control loop analysis, power devices, as well as regulations concern- ing safety, EMC and the emerging standby consumption requirements. Lots of variable are involved and complex tradeoffs are necessary to meet the goal. In this scenario, the high-voltage monolithic switchers of the L6590 family greatly simplify the task and, at the same time, allow to build robust and cost-effective low-power systems. In this application note, after a review of flyback topology, a step-by-step design procedure of an offline sin- gle-output flyback converter will be outlined. As an example, the design of the test board will be carried out in details. |
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