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FXPS7115D4 데이터시트(PDF) 43 Page - NXP Semiconductors

부품명 FXPS7115D4
상세설명  Digital absolute pressure sensor, 40 kPa to 115 kPa
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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
Bit
Symbol
Description
7 to 4
ST_CTRL[3:0]
The self-test control bits select one of the various analog and digital self-test features of the device as shown in
Table 73. The self-test control bits are not included in the read/write array error detection.
3 to 0
reserved
These bits are reserved.
Table 72. DSP_CFG_U5 - DSP user configuration #5 register (address 44h) bit description
ST_CTRL[3] ST_CTRL[2] ST_CTRL[1] ST_CTRL[0] Function
SNS_DATAx_X contents
16-bit data
0
0
0
0
Normal pressure signal
reserved
0
0
0
1
P-cell common mode verification
reserved
0
0
1
0
reserved
reserved
0
0
1
1
reserved
reserved
0
1
0
0
DSP write to SNS_DATAx_X registers inhibited. 0000h
0
1
0
1
DSP write to SNS_DATAx_X registers inhibited. AAAAh
0
1
1
0
DSP write to SNS_DATAx_X registers inhibited. 5555h
0
1
1
1
DSP write to SNS_DATAx_X registers inhibited. FFFFh
1
0
0
0
reserved
reserved
1
0
0
1
reserved
reserved
1
0
1
0
reserved
reserved
1
0
1
1
reserved
reserved
1
1
0
0
Digital self-test 0
8171h
1
1
0
1
Digital self-test 1
6C95h
1
1
1
0
Digital self-test 2
807Ah
1
1
1
1
Digital self-test 3
78ACh
Table 73. Self-test control bits (ST_CTRL[3:0])
7.7.12 INT_CFG - interrupt configuration register (address 45h)
The interrupt configuration register contains configuration information for the interrupt output. This register can
be written during initialization but is locked once the ENDINIT bit is set (see Section 7.7.4 "DEVLOCK_WR -
lock register writes register (address 10h)"). The register is included in the read/write array error detection.
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
INT_PS[1:0]
INT_POLARITY
reserved
Reset
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 74. INT_CFG - interrupt configuration register (address 45h) bit allocation
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 6.2 — 28 June 2023
43 / 72



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