MSP3457G datasheet(2/81 Pages) MICRONAS

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MSP 34x7G

PRELIMINARY DATA SHEET

Micronas

Contents

Page

Section

Title

Introduction

1.1.

Features of the MSP 34x7G Family and Differences to MSPD

1.2.

MSP 34x7G Version List

1.3.

MSP 34x7G Versions and their Application Fields

Functional Description

2.1.

Architecture of the MSP 34x7G Family

2.2.

Sound IF Processing

2.2.1.

Analog Sound IF Input

2.2.2.

Demodulator: Standards and Features

2.2.3.

Preprocessing of Demodulator Signals

2.2.4.

Automatic Sound Select

2.2.5.

Manual Mode

2.3.

Preprocessing for SCART

2.4.

Source Selection and Output Channel Matrix

2.5.

Audio Baseband Processing

2.5.1.

Automatic Volume Correction (AVC)

2.5.2.

Quasi-Peak Detector

2.6.

SCART Signal Routing

2.6.1.

SCART DSP In and SCART Out Select

2.6.2.

Stand-by Mode

2.7.

Digital Control I/O Pins and Status Change Indication

2.8.

Clock PLL Oscillator and Crystal Specifications

Control Interface

3.1.

I2C Bus Interface

3.1.1.

Internal Hardware Error Handling

3.1.2.

Description of CONTROL Register

3.1.3.

Protocol Description

3.1.4.

Proposals for General MSP 34x7G I2C Telegrams

3.1.4.1.

Symbols

3.1.4.2.

Write Telegrams

3.1.4.3.

Read Telegrams

3.1.4.4.

Examples

3.2.

Start-Up Sequence: Power-Up and I2C-Controlling

3.3.

MSP 34x7G Programming Interface

3.3.1.

User Registers Overview

3.3.2.

Description of User Registers

3.3.2.1.

STANDARD SELECT Register

3.3.2.2.

Refresh of STANDARD SELECT Register

3.3.2.3.

STANDARD RESULT Register

3.3.2.4.

Write Registers on I2C Subaddress 10hex

3.3.2.5.

Read Registers on I2C Subaddress 11hex

3.3.2.6.

Write Registers on I2C Subaddress 12hex

3.3.2.7.

Read Registers on I2C Subaddress 13hex

3.4.

Programming Tips

3.5.

Examples of Minimum Initialization Codes

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