Nexperia

74LVC161

Presettable synchronous 4-bit binary counter; asynchronous reset

12. Abbreviations

Table 10. Abbreviations

Acronym

Description

CDM

Charged Device Model

CMOS

Complementary Metal-Oxide Semiconductor

DUT

Device Under Test

ESD

ElectroStatic Discharge

HBM

Human Body Model

MM

Machine Model

TTL

Transistor-Transistor Logic

13. Revision history

Table 11. Revision history

Document ID

Release date Data sheet status

Change notice Supersedes

74LVC161 v.7

20210922

Product data sheet

-

74LVC161 v.6

Modifications:

• The format of this data sheet has been redesigned to comply with the identity

guidelines of Nexperia.

• Legal texts have been adapted to the new company name where appropriate.

• Section 1 and Section 2 updated.

• Type number 74LVC161DB (SOT338-1/SSOP16) removed.

• Section 7: Derating values for Ptot total power dissipation updated.

74LVC161 v.6

20130930

Product data sheet

-

74LVC161 v.5

Modifications:

• Fig. 6: Logic diagram corrected (errata).

74LVC161 v.5

20121123

Product data sheet

-

74LVC161 v.4

74LVC161 v.4

20121122

Product data sheet

-

74LVC161 v.3

74LVC161 v.3

20040330

Product specification

-

74LVC161 v.2

74LVC161 v.2

19980520

Product specification

-

74LVC161 v.1

74LVC161 v.1

19960823

Product specification

-

-

74LVC161

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© Nexperia B.V. 2021. All rights reserved

Product data sheet

Rev. 7 — 22 September 2021

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