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CS5501 데이터시트(PDF) 10 Page - Cirrus Logic |
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CS5501 데이터시트(HTML) 10 Page - Cirrus Logic |
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10 / 54 page ![]() SWITCHING CHARACTERISTICS (continued) (TA = Tmin to Tmax; VA+, VD+ = 5V ± 10%; VA-, VD- = -5V ± 10%; Input Levels: Logic 0 = 0V, Logic 1 = VD+; CL = 50 pF) Parameter Symbol Min Typ Max Units AC Mode (Mode = VD-) CS5501 only Serial Clock (In) fsclk dc - 4.2 MHz Serial Clock (In) Pulse Width High Pulse Width Low tph3 tpl3 50 180 - - - - ns ns Set-up Time CS Low to SCLK Falling tcss -20 40 ns Maximum Data Delay Time SCLK Fall to New SDATA bit tdd3 - 90 180 ns Output Float Delay CS High to Output Hi-Z (Note 21) tfd5 - 100 200 ns Notes: 21. If CS is returned high after an 11-bit data packet is started, the SDATA output will continue to output data until the end of the second stop bit. At that time the SDATA output will go to high impedance. Low Byte STOP1 STOP2 t fd5 t pl3 Hi-Z Hi-Z BIT7 BIT6 BIT9 START t ph3 t dd3 High Byte SCLK(i) SDATA CS DRDY BIT8 t css AC MODE Timing Relationships (CS5501 only) CS5501/CS5503 10 DS31F2 |
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