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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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DP83849IF 데이터시트(PDF) 71 Page - National Semiconductor (TI) |
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DP83849IF 데이터시트(HTML) 71 Page - National Semiconductor (TI) |
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71 / 108 page  71 www.national.com 5 RMII_MODE Strap, RW Reduced MII Mode: 0 = Standard MII Mode 1 = Reduced MII Mode 4 RMII_REV1_0 0, RW Reduced MII Revision 1.0: 0 = (RMII revision 1.2) CRS_DV will toggle at the end of a packet to indicate deassertion of CRS. 1 = (RMII revision 1.0) CRS_DV will remain asserted until final data is transferred. CRS_DV will not toggle at the end of a packet. 3 RX_OVF_STS 0, RO/COR RX FIFO Over Flow Status: 0 = Normal 1 = Overflow detected 2 RX_UNF_STS 0, RO/COR RX FIFO Under Flow Status: 0 = Normal 1 = Underflow detected 1:0 ELAST_BUF[1:0] 01, RW Receive Elasticity Buffer: This field controls the Receive Elasticity Buffer which allows for fre- quency variation tolerance between the 50MHz RMII clock and the recovered data. See Section 3.2 for more information on Elasticity Buffer settings in RMII mode. See Section 3.4 for more information on Elasticity Buffer settings in SCMII mode. Table 36. RMII and Bypass Register (RBR), addresses 17h (Continued) Bit Bit Name Default Description |
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