M37151EFFP datasheet(9/139 Pages) RENESAS

9 / 139 page

SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER

and ON-SCREEN DISPLAY CONTROLLER

M37151M6/M8/MA/MC/MF-XXXFP, M37151EFFP

MITSUBISHI MICROCOMPUTERS

Rev. 1.0

Notes : Port Pi (i = 0 to 3) has the port Pi direction register which can be used to program each bit for input (“0”) or an output (“1”). The pins programmed as “1” in

the direction register are output pins. When pins are programmed as “0,” they are input pins. When pins are programmed as output pins, the output data are

written into the port latch and then output. When data is read from the output pins, the data of the port latch, not the output pin level, is read. This allows a

previously-output value to be read correctly even if the output LOW voltage has risen due to, for example, a directly-driven light emitting diode was directly

driven. The input pins are in the floating state, so the values of the pins can be read. When data is written into the input pin, it is written only into the port latch,

while the pin remains in the floating state.

❈ LED drive ports 4 (P24–P27)

Name

Input/

Functions

Output

P50/HSYNC Input P5

Input

Port P5 is a 2-bit input port.

P51/VSYNC Horizonta synchronous signal

Input

The P50 pin is also used as a horizontal synchronous signal input HSYNC for OSD.

Vertical synchronous signal

Input

The P51 pin is also used as a vertical synchronous signal input VSYNC for OSD.

P52/B,

Output P5

output

Pins P52–P55 are a 4-bit output port. The output structure is CMOS output.

P53/G,

OSD output

output

Pins P52–P55 are also used as OSD output pins R, G, B and OUT respectively. The output

P54/R,

structure is CMOS output.

P55/OUT

CVIN

I/O for data slicer

Input

Input the composite video signal through a capacitor.

VHOLD

Input

Connect a capacitor between VHOLD and Vss.

HLF

I/O

Connect a filter consisting of a capacitor and a resistor, between HLF and Vss.

FILT

Clock oscillation

Input

Connect a capacitor between FILT and Vss.

filter

Table 7.2 PIN DESCRIPTION (continued)

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