SC1100 datasheet(49/348 Pages) NSC

49 / 348 page

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3.0

General Configuration Block

The General Configuration Block (GCB) includes registers

for:

• Pin Multiplexing and Miscellaneous Configuration

• WATCHDOG Timer

• High-Resolution Timer

• Clock Generators

A selectable interrupt is shared by all these functions.

3.1

CONFIGURATION BLOCK ADDRESSES

Registers of the GCB are mapped in a 64-byte address

range which is mapped to I/O space. These registers are

physically connected to the internal Fast-PCI bus, but do

not have a register block in PCI configuration space (i.e.,

they do not appear to software as PCI registers).

After system reset, the Base Address register is located at

I/O address 02EAh. This address can be used only once.

Before accessing any PCI registers, the BOOT code must

program this 16-bit register to the I/O base address for the

General Configuration Block registers. All subsequent

writes to this address, are ignored until system reset.

Note:

Location of the General Configuration Block cannot

be determined by software. See the SC1100 Infor-

mation Appliance On a Chip device errata docu-

ment.

Reserved bits in the General Configuration block should

read as written unless otherwise specified.

Table 3-1.

Configuration Space Register Map

Offset

00h

WATCHDOG Timeout (WDTO)

WATCHDOG Configuration (WDCNFG)

04h

WATCHDOG Status

(WDSTS)

Reserved

08h

TIMER Value (TMVALUE)

0Ch

TIMER Status (TMSTS)

TIMER Config

(TMCNFG)

Reserved

10h

Maximum Core Clock

Multiplier (MCCM)

Reserved

PLL Power Control

(PPCR)

Reserved

14h

Reserved

18h

Clocks: PLL3C

1Ch

Reserved

Core Clock Frequency (CCFC)

20h

Reserved

24h

28h

2Ch

30h

Pin Multiplexing (PMR)

34h

Miscellaneous Configuration (MCR)

38h

Interrupt Selection

(INTSEL)

Reserved

3Ch

IA On a Chip ID (IID)

Revision (REV)

Configuration Base Address (CBA)

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