Datasheet

15

Rev. 1.0

2023-07-11

OPTIREG™ linear TLE4263-2GS

5 V low drop voltage regulator

Application information

5.1

Reset

Figure 4

Reset timing diagram

5.2

Power-on reset delay time

If the application needs a power-on reset delay time trd different from the value given in “Reset Generator”

on Page 9, the delay capacitor’s value can be derived from these specified values and the desired power-on

delay time:

(5.1)

with:

• CD: capacitance of the delay capacitor to be chosen

• trd,new: desired power-on reset delay time

• trd: power-on reset delay time specified in this datasheet

For a precise calculation also take the delay capacitor’s tolerance into consideration.

V

I

t

V

Q

t

V

Q,rt

VRO

TimingDiagram_Reset.vsd

t

V

RO,l

1 V

1V

t

rd

Thermal

Shutdown

Input

Voltage Dip

t

rr

t

rd

t

rd

t < t

rr

t

rd

Under-

voltage

Spike at

output

Over-

load

V

DRL

V

DU

t

V

D