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DGND

Analog

Power

Supply

Load

15 V

2R

5 V

R

15 V

A1

DGND

R

R

R

2R

2R

2R

R

5 k

Ω

S2

S1

Digital interface onnections are omitted for clarity.

Switches S1 and S2 are closed; V

must be powered.

DD

c

14

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

D11

D12

D13

A0

A1

A

B

DAC

Decode

Input

Register

Input

Register

DAC A

Register

DAC B

Register

R

R

R

R

DAC A

DAC B

Set

MSB

Set

MSB

Power-On

Reset

DGND

MSB

LDAC

RS

V

DD

V

A B

REF

R A

FB

I

A

OUT

A

A

GND

A

B

GND

I

B

OUT

R B

FB

CS

CLK

SDI

EN

DAC8802

SBAS351A – AUGUST 2005 – REVISED DECEMBER 2005

Figure 15 shows the gain vs frequency performance at various attenuation settings using a 3 pF external

performance, power supply bypassing of 0.01 µF, in parallel with 1 µF, is recommended. Under these conditions,

a clean power supply with low ripple voltage capability should be used. Switching power supplies is usually not

best to derive the DAC8802 5-V supply from the system analog supply voltages (do not use the digital 5-V

supply); see Figure 31.

Figure 31. Recommended Kelvin-Sensed Hookup

Figure 32. System Level Digital Interfacing

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