CS5535 datasheet(522/555 Pages) NSC

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522

Revision 0.8

GLCP Register Descriptions (Continued)

5.20.2.8

GLCP Clock Active (GLCP_CLKACTIVE)

5.20.2.9

GLCP Clock Mask for Debug Clock Stop Action (GLCP_CLKDISABLE)

GLCP_CLKOFF Bit Descriptions

Bit

Name

Description

63:34

RSVD

Reserved

33:0

CLK_OFF

Clock Off. A 1 in any bit position causes the corresponding clock to be immediately

and unconditionally shut off. It is not intended for normal operational use, only as a

debug tool. For bit-to-clock correspondences and recommended operational settings

see Table 5-73 on page 518.

MSR Address

51700011h

Type

Reset Value

0000000x_xxxxxxxxxh

GLCP_CLKACTIVE Register Map

63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

RSVD

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

GLCP_CLKACTIVE Bit Descriptions

Bit

Name

Description

63:34

RSVD (RO)

Reserved (Read Only). Reads as 0.

33:0

CLK_ACT (RO)

Clock Active (Read Only). This register reports the status, active or inactive, of each

clock. When set, each bit indicates that a block is internally enabling its own clock. The

actual clock can be off even though the CLK_ACT bit is set, if the corresponding

CLK_OFF bit is set in GLCP_CLKOFF (MSR 51700010h). For bit-to-clock correspon-

dences and recommended operational settings see Table 5-73 on page 518.

MSR Address

51700012h

Type

R/W

Reset Value

00000000_00000000h

GLCP_CLKDISABLE Register Map

63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

RSVD

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10

7654321

RSVD

GLCP_CLKDISABLE Bit Descriptions

Bit

Name

Description

63:0

RSVD

Reserved. This register is reserved for internal testing only. These bits should not be

written to.

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