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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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CS5535 데이터시트(PDF) 524 Page - National Semiconductor (TI) |
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CS5535 데이터시트(HTML) 524 Page - National Semiconductor (TI) |
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524 / 555 page  www.national.com 524 Revision 0.8 GLCP Register Descriptions (Continued) 5.20.2.12 GLCP Debug Clock Control (GLCP_DBGCLKCTL) This register is reserved for internal testing only. These bits should not be written to. 5.20.2.13 Chip Revision ID (GLCP_CHIP_REV_ID) 0 CHIP_RESET Chip Reset. When written to a 1, the CS5535 enters reset, which in turn resets this register. JTAG logic is not reset by CHIP_RESET, but otherwise the entire chip is reset. (Default = 0.) MSR Address 51700016h Type R/W Reset Value 00000000_00000002h GLCP_DBGCLKCTL Register Map 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 RSVD 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 RSVD GLCP_DBGCLKCTL Bit Descriptions Bit Name Description 63:0 RSVD Reserved. This register is reserved for internal testing only. These bits should not be written to. MSR Address 51700017h Type RO Reset Value 00000000_000000xxh CHIP_REV_ID Register Map 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 RSVD 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 98 7654321 0 RSVD MAJ MIN CHIP_REV_ID Bit Descriptions Bit Name Description 63:8 RSVD Reserved 7:4 MAJ Major Revision. Identifies major silicon revision. See CS5535 I/O Companion Device Errata document for value. 3:0 MIN Minor Revision. Identifies minor silicon revision. See CS5535 I/O Companion Device Errata document for value. GLCP_SYS_RST Bit Descriptions Bit Name Description |
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