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74ALVC574 데이터시트(PDF) 8 Page - Nexperia B.V. All rights reserved |
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74ALVC574 데이터시트(HTML) 8 Page - Nexperia B.V. All rights reserved |
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8 / 15 page ![]() Nexperia 74ALVC574 Octal D-type flip-flop; positive edge-trigger; 3-state mna644 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. Fig. 8. Enable and disable times mna202 GND GND th th tsu tsu VM VM VM VI VOH VOL VI Qn output CP input Dn input Measurement points are given in Table 8. VOL and VOH are the typical output voltage levels that occur with the output load. The shaded areas indicate when the input is permitted to change for predicable output performance. Fig. 9. Data set-up and hold times for the Dn input to the CP input 74ALVC574 All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2021. All rights reserved Product data sheet Rev. 3 — 30 April 2021 8 / 15 |
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