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UPD6P9 데이터시트(PDF) 13 Page - Renesas Technology Corp

부품명 UPD6P9
상세설명  MOS INTEGRATED CIRCUIT
PDF  73 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD6P9 데이터시트(HTML) 13 Page - Renesas Technology Corp

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11
µPD67, 67A, 68, 68A, 69
Data Sheet U14935EJ2V1DS
2.5 Data Memory (RAM): 32
× 4 Bits (
µPD67, 67A, 68, 68A)
128
× 4 Bits (
µPD69)
The data memory, which is a static RAM consisting of 32
× 4 bits, is used to retain processed data. The data
memory is sometimes processed in 8-bit units. R0 can be used as the ROM data pointer.
RF is also used as the ASR.
After reset, R0 is cleared to 00H and R1 to RF retain the previous data (undefined when turning on the power).
Figure 2-4. Data Memory Configuration
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
RA
RB
RC
RD
RE
RF
R10
R00
R11
R01
R12
R02
R13
R03
R14
R04
R15
R05
R16
R06
R17
R07
R18
R08
R19
R09
R1A
R0A
R1B
R0B
R1C
R0C
R1D
R0D
R1E
R0E
R1F
R0F
→DP (refer to 2.6 Data Pointer (DP))
→ASR (refer to 2.3 Address Stack Register (ASR (RF)))
R1n (higher 4 bits) R0n (lower 4 bits)
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
RA
RB
RC
RD
RE
RF
R10
R00
R11
R01
R12
R02
R13
R03
R14
R04
R15
R05
R16
R06
R17
R07
R18
R08
R19
R09
R1A
R0A
R1B
R0B
R1C
R0C
R1D
R0D
R1E
R0E
R1F
R0F
R1n (higher 4 bits) R0n (lower 4 bits)
Page 0
Note
Pages 1 to 3
Note
Note
µPD67, 67A, 68, 68A: Page 0
µPD69:
Pages 0 to 3 (pages can be switched using bits 0 and 1 of control register 0)



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