11

µPD6221

I2C BUS ACCESS

Data example; (CS2, CS1, CS0) = (A2, A1, A0) = (0, 0, 1)

(S3, S2, S1, S0) = (0, 1, 0, 0) Select output 4ch

Digital Data = (0, 1, 0, 1, 0, 1, 0, 1)

SLAVE ADDRESS DATA BLOCK

SUB ADDRESS DATA BLOCK

SDA

SCL

1

Start condition

Note 1

Note 2

23456789

“1”

“0”

“0”

“1”

“0”

“0”

“0”

“1”

ACK

SDA

SCL

123456789

“0”

“0”

“0”

“0”

“1”

“0”

“0”

“0”

ACK

D/A DATA BLOCK

Notes 1. The timing of reading data in SDA is the falling edge of SCL.

2. The acknowledgement signal is output from SDA in fall-timing of SCL8, and releases SDA line in the

fall-timing of SCL9.

SDA

SCL

D/A output

Output the front Data

Analog Voltage output

123456789

“0”

“1”

“0”

“1”

“0”

“1”

“0”

“1”

ACK

Stop condition