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MCP19116T-E/MJ 데이터시트(PDF) 17 Page - Microchip Technology

부품명 MCP19116T-E/MJ
상세설명  Digitally Enhanced Power Analog Synchronous Low-Side PWM Controller with Improved 8k Word Core
PDF  246 Pages
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제조업체  MICROCHIP [Microchip Technology]
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 2015-2020 Microchip Technology Inc.
DS20005479D-page 17
MCP19116/7
2.1.18
IP PIN
Primary input current-sense for current mode control
and peak current limit. For voltage mode control, this
pin can be connected to an artificial ramp.
2.1.19
AGND PIN
AGND is the small signal ground connection pin. This
pin should be connected to the exposed pad on the
bottom of the package.
2.1.20
PGND PIN
Connect all large-signal level ground returns to PGND.
These large-signal level ground traces should have a
small loop area and minimal length to prevent coupling
of switching noise to sensitive traces.
2.1.21
SDRV PIN
The gate of the low-side secondary MOSFET is
connected to SDRV. The PCB trace connecting SDRV
to the gate must be of minimal length and appropriate
width to handle the high-peak drive current and fast
voltage transitions.
2.1.22
PDRV PIN
The gate of the low-side primary MOSFET is
connected to PDRV. The PCB tracing connecting
PDRV to the gate must be of minimal length and
appropriate width to handle the high-peak drive
currents and fast voltage transitions.
2.1.23
VDR PIN
The supply for the low-side drivers is connected to this
pin and has an absolute maximum rating of +13.5V.
This pin can be connected by an RC filter to the VDD
pin.
2.1.24
VDD PIN
The output of the internal +5.0V regulator is connected
to this pin. It is recommended that a 1.0 µF minimum/
10 µF maximum bypass capacitor be connected
between this pin and the GND pin of the device. The
bypass capacitor should be physically placed close to
the device.
2.1.25
VIN PIN
Input power connection pin of the device. It is
recommended that capacitance be placed between this
pin and the GND pin of the device.
2.1.26
VS PIN
Analog input connected to the non-inverting input of the
overvoltage
comparator.
Typically
used
as
output-voltage overvoltage protection. The inverting
input of the overvoltage comparator is controlled by the
OV REF DAC.
2.1.27
IFB PIN
Error-amplifier inverting feedback connection.
2.1.28
ICOMP PIN
Error-amplifier output signal.
2.1.29
EXPOSED PAD (EP)
It is recommended to connect the exposed pad to
AGND.



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