7/20
MTD502E Revision 1.3 12/07/2000
MTD502E
MYSON
TECHNOLOGY
94
IO
FdCo0_D FdCo0_D FdCo0_D FdCo0_D Port0: FULL/COL LED display, low_active. *
when in full duplex mode: this LED pin is always in
low_active.
when in half duplex mode: this LED pin present
port0’s collision event, using flash style for display.
95
IO
LnAc1_D LnAc1_D LnAc1_D LnAc1_D Port1: Link_Activity LED display, low_active. *
when in Link_On state : this LED pin is always in
low_active.
when have Tx or Rx activity in this port : this LED
pin present port1’s Tx/Rx activity, using flash style
for display.
96
IO
LnAc0_D LnAc0_D LnAc0_D LnAc0_D Port0: Link_Activity LED display, low_active. *
when in Link_On state : this LED pin is always in
low_active.
when have Tx or Rx activity in this port : this LED
pin present port0’s Tx/Rx activity, using flash style
for display.
97
IO
LnRx1_D LnRx1_D LnRx1_D LnRx1_D Port1: Link_Rx LED display, low_active. *
when in Link_On state : this LED pin is always in
low_active.
when have Rx activity in this port : this LED pin
present port1’s Rx activity, using flash style for dis-
play.
98
IO
LnRx0_D LnRx0_D LnRx0_D LnRx0_D Port0: Link_Rx LED display, low_active. *
when in Link_On state : this LED pin is always in
low_active.
when have Rx activity in this port : this LED pin
present port0’s Rx activity, using flash style for dis-
play.
99~102
IO
(NC)
(NC)
(NC)
(NC)
103
VCC
104
IO
(NC)
(NC)
(NC)
(NC)
105
GND
106~110
IO
(NC)
(NC)
(NC)
(NC)
111
IO
(NC)
P0MDIO
(NC)
P0MDIO
112
IO
(NC)
P0MDC
(NC)
P0MDC
113
IO
(NC)
(NC)
(NC)
(NC)
114
IO
CLK25O CLK25O CLK25O CLK25O clock 25Mhz output.
115~116
IO
(NC)
(NC)
(NC)
(NC)
117
GND
118~120
IO
(NC)
(NC)
(NC)
(NC)
121
VCC
122
I
SYSCLK SYSCLK SYSCLK SYSCLK system clock input, 50Mhz operation.
123
GND
MTD502EF (128PQFP) Pin Definition Mapping Under Different Configurations
Pin No.
I/O
MII
mode
Phy_MII
mode
Rmii
mode
Phy_Rm
ii mode
Descriptions
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