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UPD16682AP 데이터시트(PDF) 14 Page - Renesas Technology Corp

부품명 UPD16682AP
상세설명  MOS INTEGRATED CIRCUIT
PDF  58 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

UPD16682AP 데이터시트(HTML) 14 Page - Renesas Technology Corp

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Data Sheet S14402EJ1V0DS
12
µµµµPD16682A
4. PIN I/O CIRCUITS AND RECOMMENDED CONNECTION OF UNUSED PINS
The input/output circuit type of each pin and recommended connection of unused pins are shown in the following
table.
Pin Name
I/O
Recommended Connection of Unused Pins
Notes
P,/S
Input
Mode setting pin
1
/CS1
Input
Connect to VSS
CS2
Input
Connect to VDD
/RD(E)
Input
Connect to VDD (80 series interface),
connect to VDD or VSS (serial interface)
/WR (R,/W)
Input
Connect to VDD or VSS (serial interface)
C86
Input
Mode setting pin
1
D0 to D5
Input/Output
Leave open (when using serial interface)
2
D6 (SCL)
Input/Output
D7 (SI)
Input/Output
A0
Input
Data/command setting pin
3
TESTOUT
Output
Leave open
/RESET
Input
Connect to VDD
CLS
Input
Mode setting pin
1
FR
Input/Output
Leave open (when using master mode, M,/S = H)
FRS
Output
Leave open
/DOF
Input/Output
Leave open (when using master mode, M,/S = H)
M,/S
Input
Mode setting pin
1
CL
Input/Output
Display clock
4
HPM
Input
Mode setting pin
1
IRS
Input
Mode setting pin
1
TCS1
Input
Mode setting pin
1
TCS2
Input
Mode setting pin
1
TEST3
Input
Leave open
2
TEST4
Output
Leave open
TEST5
Output
Leave open
Notes 1. Connect to VDD or VSS according to the selected mode.
2. These pins are pulled down to VSS in the IC.
3. Input CPU output from VDD or VSS according to the selected register.
4. This pin is an output when M,/S = H and CLS = H but should otherwise be used to input the display clock.



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