UPD17072 datasheet(23/228 Pages) RENESAS

23 / 228 page

µPD17072,17073

2.2 Program Memory

Figure 2-2 shows the configuration of the program memory.

As shown in this figure, the program memory is configured as follows:

µPD17072: 3072 × 16 bits (0000H-0BFFH)

µPD17073: 4096 × 16 bits (0000H-0FFFH)

Therefore, the addresses of the program memory range from 0000H to 0FFFH.

All the “instructions” are “one-word instructions” each of which is 16 bits long. Consequently, one instruction can

be stored in one address of the program memory.

As constant data, the contents of the program memory are read to the data buffer by using a table reference

instruction.

Figure 2-2. Configuration of Program Memory

Caution With the

µPD17072, the range of addresses that can be called by each instruction is 0000H to

0BFFH. The area from addresses 0C00H through 0FFFH is an undefined area.

2.3 Program Counter

Figure 2-3 shows the configuration of the program counter.

The program counter specifies an address of the program memory.

As shown in this figure, the program counter is a 12-bit binary counter. The most significant bit b11 indicates a

page.

Figure 2-3. Configuration of Program Counter

PC11

PC10

PC9

PC8

PC7

PC6

Page

PC5

PC4

PC3

PC2

PC1

PC0

Reset start address

Serial interface interrupt vector

Basic timer 1 interrupt vector

INT pin interrupt vector

(with PD17072)

(with PD17073)

16 bits

Page 0

CALL addr

instruction

subroutine

entry address

Page 1

BR addr

instruction

branch address

BR @AR

instruction

branch address

CALL @AR

instruction

subroutine entry

address

MOVT DBF @AR

instruction table

reference address

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