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ADG736LBRM 데이터시트(PDF) 9 Page - Analog Devices |
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ADG736LBRM 데이터시트(HTML) 9 Page - Analog Devices |
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9 / 12 page ![]() ADG736L Rev. 0 | Page 9 of 12 TEST CIRCUITS SD VS RON = V1/IDS IDS V1 Figure 10. On Resistance SD VS VD IS (OFF) A Figure 11. Off Leakage SD VD ID (ON) A NC Figure 12. On Leakage 0.1 μF IN SD VDD RL 300 Ω CL 35pF VOUT VDD GND VS 50% 50% 90% 90% tON tOFF VOUT VIN VS Figure 13. Switching Times 0.1 μF SA D VDD RL 300 Ω CL 35pF VOUT VDD GND VS SB VIN 50% 50% 50% 0V 0V 50% 90% tD tD VOUT VS VIN Figure 14. Break-Before-Make Time Delay, tD VDD RL 50 Ω 0.1 μF VOUT VIN VS VDD IN SA SB D GND Figure 15. Off Isolation VDD 0.1 μF VDD GND CHANNEL-TO-CHANNEL CROSSTALK = 20 × LOG |V S/VOUT| 50 Ω VIN1 VS SD VIN2 VOUT SD NC RL 50 Ω Figure 16. Channel-to-Channel Crosstalk VDD RL 50 Ω 0.1 μF VOUT VIN VS VDD IN SD GND Figure 17. Bandwidth |
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