ST7FL15F1MATRE datasheet(118/138 Pages) STMICROELECTRONICS

118 / 138 page

ST7L15, ST7L19

118/138

ELECTRICAL CHARACTERISTICS (cont’d)

13.9 CONTROL PIN CHARACTERISTICS

13.9.1 Asynchronous RESET Pin

TA = -40 to +125°C, unless otherwise specified.

Notes:

1. Data based on characterization results, not tested in production.

2. The IIO current sunk must always respect the absolute maximum rating specified in section 13.2.2 on page 99 and the

sum of IIO (I/O ports and control pins) must not exceed IVSS.

3. The RON pull-up equivalent resistor is based on a resistive transistor. Specified for voltages on RESET pin between

VILmax and VDD.

4. To guarantee the reset of the device, a minimum pulse must be applied to the RESET pin. All short pulses applied on

RESET pin with a duration below th(RSTL)in can be ignored.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

Input low-level voltage

Vss - 0.3

0.3xVDD

VIH

Input high-level voltage

0.7xVDD

VDD + 0.3

Vhys

Schmitt trigger voltage hysteresis1)

VOL

Output low-level voltage2)

VDD =5V

IIO = +5mA,

TA ≤ +125°C

0.5

1.0

IIO = +2mA,

TA ≤ +125°C

0.2

0.4

RON

Pull-up equivalent resistor1)3)

VDD = 5V

Ω

VDD =3.3V

120

tw(RSTL)ou

Generated reset pulse duration

Internal reset sources

µs

th(RSTL)in

External reset pulse hold time4)

tg(RSTL)in

Filtered glitch duration

200

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