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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST7FL15F1MATRE 데이터시트(PDF) 122 Page - STMicroelectronics |
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ST7FL15F1MATRE 데이터시트(HTML) 122 Page - STMicroelectronics |
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122 / 138 page  ST7L15, ST7L19 122/138 ELECTRICAL CHARACTERISTICS (cont’d) 13.11 10-BIT ADC CHARACTERISTICS Subject to general operating conditions for VDD, fOSC and TA unless otherwise specified. Figure 99. Typical Application with ADC Notes: 1. Unless otherwise specified, typical data is based on TA = 25°C and VDD -VSS = 5V. They are given only as design guidelines and are not tested. 2. When VDDA and VSSA pins are not available on the pinout, the ADC refers to VDD and VSS. 3. Any added external serial resistor downgrades the ADC accuracy (especially for resistance greater than 10k Ω). Data based on characterization results, not tested in production. 4. The stabilization time of the AD converter is masked by the first tLOAD. The first conversion after the enable is then always valid. Related application notes Understanding and minimizing ADC conversion errors (AN1636) Software techniques for compensating ST7 ADC errors (AN1711) Symbol Parameter Conditions Min Typ1) Max Unit fADC ADC clock frequency 4 MHz VAIN Conversion voltage range2) VSSA VDDA V RAIN External input resistor 103) k Ω CADC Internal sample and hold capacitor 6 pF tSTAB Stabilization time after ADC enable fCPU =8 MHz, fADC =4 MHz 04) µs tADC Conversion time (Sample+Hold) 3.5 - Sample capacitor loading time - Hold conversion time 4 10 1/fADC IADC Analog part 1 mA Digital part 0.2 AINx ST7 VDD IL ±1µA VT 0.6V VT 0.6V CADC 6pF VAIN RAIN 10-bit A/D conversion |
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