Si53112

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17

Rev. 1.1 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • September 2, 2021

Figure 6. Differential (CLOCK–CLOCK) Measurement Points (Tperiod, Duty Cycle, Jitter)

3.2. Termination of Differential Outputs

All differential outputs are to be tested into a 100

 or 85  differential impedance transmission line. Source

terminated clocks have some inherent limitations as to the maximum trace length and frequencies that can be

supported. For CPU outputs, a maximum trace length of 10” and a maximum of 200 MHz are assumed. For SRC

clocks, a maximum trace length of 16” and maximum frequency of 100 MHz is assumed. For frequencies beyond

200 MHz, trace lengths must be restricted to avoid signal integrity problems.

3.2.1. Termination of Differential NMOS Push-Pull Type Outputs

Figure 7. 0.7 V Configuration Test Load Board Termination for NMOS Push-Pull

Table 16.

Clock

Board Trace Impedance

Rs

Rp

Unit

DIFF Clocks—50

 configuration

100

33+5%

N/A



DIFF Clocks—43

 configuration

85

27+5%

N/A



TPeriod

Low Duty Cycle %

High Duty Cycle %

Skew measurement

point

0.000 V

T-Line

10" Typical

T-Line

10" Typical

Receiver

2 pF

2 pF

Source Terminated

Rs

Rs

Clock

Clock #