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AS7343

Datasheet

• PUBLIC

DS001046

• v6-00 • 2023-Jun-07

│ 26

Addr: 0xCD

LED

Bit

Bit Name

Default

Access

Bit Description

……

111 1110: 256 mA

111 1111: 258 mA

INTENAB Register (Address 0xF9)

Figure 24:

INTENAB Register

Addr: 0xF9

INTENAB

Bit

Bit Name

Default

Access

Bit Description

ASIEN

Spectral and Flicker Detect Saturation Interrupt

Enable.

When asserted permits saturation interrupts to be

generated.

6:4

Reserved

SP_IEN

Spectral Interrupt Enable.

When asserted permits interrupts to be generated,

subject to the spectral thresholds and persistence

filter. Bit is mirrored in the ENABLE register.

F_IEN

FIFO Buffer Interrupt Enable.

When asserted permits interrupt to be generated

when FIFO_LVL exceeds the FIFO threshold

condition.

Reserved

SIEN

System Interrupt Enable.

When asserted permits system interrupts to be

generated. Indicates that flicker detection status has

changed or SMUX operation has finished.

CONTROL Register (Address 0xFA)

Figure 25:

CONTROL Register

Addr: 0xFA

CONTROL

Bit

Bit Name

Default

Access

Bit Description

7:4

Reserved

SW_RESET

Software Reset

When set the device will force a power on reset.

SP_MAN_AZ

Spectral Engine Manual Autozero.

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