RT6203E

18

DS6203E-00 January 2019

www.richtek.com

©

Copyright 2019 Richtek Technology Corporation. All rights reserved.

is a registered trademark of Richtek Technology Corporation.

If the application calls for a higher ambient temperature

and may exceed the recommended maximum junction

temperature of 125

°C, care should be taken to reduce the

temperature rise of the part by using a heat sink or air

flow.

Resistance vs. Temperature

0

10

20

30

40

50

60

70

-50

-25

0

25

50

75

100

125

Temperature (°C)

RDS(ON)_H

RDS(ON)_L

Figure 6. RT6203E RDS(ON) vs. Temperature

Layout Considerations

Follow the PCB layout guidelines for optimal performance

of the device.



Keep the high-current paths short, especially at the

ground terminals. This practice is essential for stable,

jitter-free operation. The high current path comprising

of input capacitor, high-side FET, inductor, and the output

capacitor should be as short as possible. This practice

is essential for high efficiency.



Place the input MLCC capacitors as close to the VIN

and GND pins as possible. The major MLCC capacitors

should be placed on the same layer as the RT6203E.



SW node is with high frequency voltage swing and

should be kept at small area. Keep analog components

away from the SW node to prevent stray capacitive noise

pickup.



Connect feedback network behind the output capacitors.

Place the feedback components next to the FB pin.



For better thermal performance, to design a wide and

thick plane for GND pin or to add a lot of vias to GND

plane.

An example of PCB layout guide is shown from Figure 7.