전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

STR91XF 데이터시트(PDF) 65 Page - STMicroelectronics

부품명 STR91XF
상세설명  ARM966E-S TM 16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
PDF  73 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR91XF 데이터시트(HTML) 65 Page - STMicroelectronics

Back Button STR91XF_07 Datasheet HTML 61Page - STMicroelectronics STR91XF_07 Datasheet HTML 62Page - STMicroelectronics STR91XF_07 Datasheet HTML 63Page - STMicroelectronics STR91XF_07 Datasheet HTML 64Page - STMicroelectronics STR91XF_07 Datasheet HTML 65Page - STMicroelectronics STR91XF_07 Datasheet HTML 66Page - STMicroelectronics STR91XF_07 Datasheet HTML 67Page - STMicroelectronics STR91XF_07 Datasheet HTML 68Page - STMicroelectronics STR91XF_07 Datasheet HTML 69Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 65 / 73 page
background image
STR91xF
Electrical characteristics
65/73
6.14.4 I2C electrical characteristics
VDDQ = 2.7 - 3.6V, VDD = 1.65 - 2V, TA = -40 / 85 °C unless otherwise specified.
Table 28.
I2C Electrical Characteristics
Notes: 1 The device must internally provide a hold time of at least 300 ns for the SDA signal in order to
bridge the undefined region of the falling edge of SCL
2 The maximum hold time of the START condition has only to be met if the interface does not
stretch the low period of SCL signal
3Cb = total capacitance of one bus line in pF
Symbol
Parameter
Standard I2C
Fast I2C
Unit
MinMax
MinMax
tBUF
Bus free time between a STOP
and START condition
4.7
1.3
ms
tHD:STA
Hold time START condition.
After this period, the first clock
pulse is generated
4.0
0.6
µs
tLOW
LOW period of the SCL clock
4.7
1.3
µs
tHIGH
HIGH period of the SCL clock
4.0
0.6
µs
tSU:STA
Set-up time for a repeated
START condition
4.7
0.6
µs
tHD:DAT
Data hold time
0
0
ns
tSU:DAT
Data set-up time
250
100
ns
tR
Rise time of both SDA and SCL
signals
1000
20+0.1Cb
300
ns
tF
Fall time of both SDA and SCL
signals
300
20+0.1Cb
300
ns
tSU:STO
Set-up time for STOP condition
4.0
0.6
µs
Cb
Capacitive load for each bus
line
400
400
pF



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com