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VV6501 데이터시트(PDF) 16 Page - STMicroelectronics |
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VV6501 데이터시트(HTML) 16 Page - STMicroelectronics |
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16 / 60 page ![]() Functional Description VV6501 16/60 Timing of Frame Start signal (FST) The frame-level position of FST is illustrated in Figure 12. The FST pulse qualifies the Status Line information and is 648 QCKs (slow) long. Figure 12: FST timing overview Figure 13: Detailed FST timing FST: 1 Frame 0H 1H 0H 1H FH FH 1H 9H CH 7H 0H 7H 0H 7H 4H 0H 0H 7H 0H 7H 8H 0H 0H 0H Start of Frame Line Code D1 D0 D3 D2 FH Frame start pulse qualifies status line: 648 QCKs 644 QCKs 4 QCKs Data Bus FST pin: |
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