MP8792 – 16V, 12A, SYNCHRONOUS STEP-DOWN CONVERTER

MP8792 Rev. 1.0

www.MonolithicPower.com

18

12/2/2019

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© 2019 MPS. All Rights Reserved.

)

1

(

2

IN

OUT

SW

OUT

OUT

LP

V

V

L

f

V

I

I













(16)

MPS inductors are optimized and tested for use

with our complete line of integrated circuits.

Table

2

lists

our

power

inductor

recommendations. Select a part number based

on your design requirements.

Table 2: Power Inductor Selection

Part Number

Inductor

Value

Manufacturer

MPL-AY1265

0.47

μH

MPS

Visit MonolithicPower.com under Products >

Inductors for more information.

PCB Layout Guidelines

Efficient

PCB

layout

is

critical for

stable

operation. For the best results, refer to Figure 6

and follow the guidelines below:

1. Place the input MLCC capacitors as close to

the VIN and PGND pins as possible.

2. Place major MLCC capacitors on the same

layer as the MP8792.

3. Maximize the VIN and PGND copper plane

to minimize parasitic impedance.

4. For the QFN-21 package, a 0402 capacitor

with a minimum 1µF value is required.

5. Place the 0402 capacitor on the right side of

the IC.

6. Extend VIN to the right side and connect it to

the 0402 capacitor.

7. Place at least two 20/10 mil vias on the

ground side of the capacitor to the inner solid

ground plane.

8. Place as many PGND vias as possible close

to PGND, to minimize parasitic impedance

and thermal resistance.

9. Place the VCC decoupling capacitor close to

the device.

10. Connect AGND and PGND at the point of the

VCC capacitor

’s ground connection.

11. Place the BST capacitor as close to BST and

SW as possible. Use traces (with a width of

20 mil or wider) to route the path. It is

recommended to use a bootstrap capacitor

between 0.1µF and 1µF.

12. Place the REF capacitor close to TRK/REF

to VSNS-.

13. If a via must be placed on the PGOOD pad,

place it at least 10mm away from the positive

side of the first input decoupling capacitor,

close to the IC.

SW

PGND

VOUT

PGND

VIN

VO-

RFB2

CSS2

VOSENSE+

VOSENSE-

CVCC

VIN

Figure 6: Recommended PCB Layout (QFN-21)