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ES9018S 데이터시트(PDF) 34 Page - ESS Technology,Inc

부품명 ES9018S
상세설명  Reference 32-bit Audio DAC
PDF  54 Pages
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제조업체  ESS [ESS Technology,Inc]
홈페이지  http://www.esstech.com
Logo ESS - ESS Technology,Inc

ES9018S 데이터시트(HTML) 34 Page - ESS Technology,Inc

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ES9018S Product Datasheet
ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 WWW.ESSTECH.COM
34
Register 45-42: STAGE 2 FIR COEFFICIENTS
Bits
[31:0]
Default
-
Bits
Mnemonic
Description
[31:0]
STAGE2_FIR_COEFFICIENTS
These 32 bits are used for writing the stage 1 FIR coefficients.
See the programming section for more information.
Register 71-48: SPDIF CHANNEL STATUS DATA
Bits
[191: 0]
Default
-
Bits
Mnemonic
Description
[191: 0]
SPDIF_CHANNEL_STATUS_DATA
These registers allow read back of the SPDIF channel status.
The status definition is different for the customer configuration
(Table 7) and professional configuration (Table 8)



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