MC74AC374, MC74ACT374

http://onsemi.com

2

TRUTH TABLE

Inputs

Outputs

CP

OE

H

L

H

L

L

L

X

X

H

Z

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

Z = High Impedance

= LOW-to-HIGH Transition

FUNCTIONAL DESCRIPTION

The MC74AC374/74ACT374 consists of eight edge−

triggered flip−flops with individual D−type inputs and

3−state true outputs. The buffered clock and buffered Output

Enable are common to all flip−flops. The eight flip−flops

will store the state of their individual D inputs that meet the

setup and hold time requirements on the LOW−to−HIGH

Clock (CP) transition. With the Output Enable (OE) LOW,

the contents of the eight flip−flops are available at the

outputs. When the OE is HIGH, the outputs go to the high

impedance state. Operation of the OE input does not affect

the state of the flip−flops.

Figure 3. Logic Diagram

CP D

QQ

CP D

QQ

CP D

QQ

CP D

QQ

CP D

QQ

CP D

QQ

CP D

QQ

CP D

QQ

OE

CP

NOTE:

That this diagram is provided only for the understanding of logic

operations and should not be used to estimate propagation delays.

MAXIMUM RATINGS

Symbol

Parameter

Value

Unit

DC Supply Voltage (Referenced to GND)

−0.5 to +7.0

V

DC Input Voltage (Referenced to GND)

V

DC Output Voltage (Referenced to GND)

V

DC Input Current, per Pin

±20

mA

DC Output Sink/Source Current, per Pin

±50

mA

±50

mA

Storage Temperature

−65 to +150

°C

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.