SST25VF040B datasheet(13/31 Pages) MICROCHIP

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DS20005051F-page 13

SST25VF040B

FIGURE 5-7:

AUTO ADDRESS INCREMENT (AAI) WORD PROGRAM SEQUENCE WITH

SOFTWARE END OF WRITE DETECTION

5.7

4-KByte Sector Erase

The Sector Erase instruction clears all bits in the

selected 4-Kbyte sector to FFH. A Sector Erase

instruction applied to a protected memory area will be

ignored. Prior to any Write operation, the Write Enable

(WREN) instruction must be executed. CE# must remain

active-low for the duration of any command sequence.

The Sector Erase instruction is initiated by executing

an 8-bit command, 20H, followed by address bits [A23-

A0]. Address bits [AMS-A12] (AMS = Most Significant

address) are used to determine the sector address

(SAX), remaining address bits can be VIL or VIH. CE#

must be driven high before the instruction is executed.

The user may poll the BUSY bit in the software

STATUS register or wait TSE for the completion of the

internal self-timed Sector Erase cycle. See Figure 5-8

for the Sector Erase sequence.

FIGURE 5-8:

SECTOR ERASE

SEQUENCE

5.8

32-Kbyte and 64-Kbyte Block

Erase

The 32-Kbyte Block Erase instruction clears all bits in

the selected 32 Kbyte block to FFH. A Block Erase

instruction applied to a protected memory area will be

ignored. The 64-Kbyte Block-Erase instruction clears

all bits in the selected 64 Kbyte block to FFH. A Block

Erase instruction applied to a protected memory area

will be ignored.

Prior to any Write operation, the Write Enable (WREN)

instruction must be executed. CE# must remain active-

low for the duration of any command sequence. The

32-Kbyte Block Erase instruction is initiated by

executing an 8-bit command, 52H, followed by address

bits [A23-A0]. Address bits [AMS-A15] (AMS =Most

Significant Address) are used to determine block

address (BAX), remaining address bits can be VIL or

VIH. CE# must be driven high before the instruction is

executed. The 64-Kbyte Block Erase instruction is

initiated by executing an 8-bit command D8H, followed

by address bits [A23-A0]. Address bits [AMS-A15] are

used to determine block address (BAX) while remaining

address bits can be VIL or VIH. CE# must be driven high

before the instruction is executed. The user may poll

the BUSY bit in the software STATUS register or wait

TBE for the completion of the internal self-timed 32-

Kbyte Block Erase or 64-Kbyte Block Erase cycles.

See Figure 5-9 and Figure 5-10 for the 32-Kbyte Block

Erase and 64-Kbyte Block Erase sequences.

FIGURE 5-9:

32-KBYTE BLOCK ERASE

SEQUENCE

Note 1: Valid commands during AAI programming: RDSR command or WRDI command.

07 8

15 16

23 24

7 8

15 16

7 8

15 16

CE#

SCK

DOUT

MODE 3

MODE 0

Wait TBP or poll software STATUS

(1) command

Last 2

Data Bytes

WRDI to exit

AAI Mode

Load AAI command, Address, 2 bytes data

Dn-1

WRDI

RDSR

CE#

SCK

ADD.

0 1 234 5 6 78

ADD.

15 16

23 24

MODE 0

MODE 3

CE#

SCK

ADDR

0 1 234 5 6 78

ADDR

15 16

23 24

MODE 0

MODE 3

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