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NAND256-M 데이터시트(PDF) 12 Page - STMicroelectronics |
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NAND256-M 데이터시트(HTML) 12 Page - STMicroelectronics |
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12 / 23 page ![]() Summary description NAND256-M, NAND512-M, NAND01G-M 12/23 Table 4. Signal Names - NAND Flash & DDR LPSDRAM NAND Flash I/O0-I/O15 Data Inputs/Outputs AL Address Latch Enable CL Command Latch Enable EF Chip Enable R Read Enable RB Ready/Busy (open-drain output) WF Write Enable WP Write Protect VDDF Supply Voltage VSSF Ground DDR LPSDRAM A0-A12 Address Inputs A10 determines the Precharge mode. BA0-BA1 Bank Select Inputs DQ0-DQ15 Data Inputs/Outputs UDQS-LDQS Data Strobe Inputs/Outputs K Clock Input K Clock Input KE Clock Enable Input ED Chip Select inputs WD Write Enable Input RAS Row Address Strobe Input CAS Column Address Strobe Input DQM0 DQ Mask Enable Input (controls DQ0-DQ7) DQM1 DQ Mask Enable Input (controls DQ8-DQ15) VDDD Supply Voltage VDDQD Input/Output Supply Voltage VSSD Ground VSSQD Input/Output Ground NC Not Connected Internally DU Do Not Use |
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