WM8718

Production Data

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PD Rev 4.3 November 2006

20

DAC OUTPUT ATTENUATION

Registers DACR and DACL control the left and right channel attenuation. Table 9 shows how the

attenuation levels are selected from the 8-bit words.

DACX[7:0]

ATTENUATION LEVEL

00(hex)

∞dB (mute)

01(hex)

127.5dB

:

:

:

:

:

:

FE(hex)

0.5dB

FF(hex)

0dB

Table 5 Attenuation Control Levels

MUTE MODES

Figure 13 shows the application and release of MUTE whilst a full amplitude sinusoid is being

played at 48kHz sampling rate. When MUTE (lower trace) is asserted, the output (upper trace)

begins to decay exponentially from the DC level of the last input sample. The output will decay

asserted, the output will restart almost immediately from the current input sample.

-2.5

-2

-1.5

-1

-0.5

0

0.5

1

1.5

0

0.001

0.002

0.003

0.004

0.005

0.006

Time(s)

Figure 13 Application and Release of Soft Mute

Setting the MUT register bit will apply a 'soft' mute to the input of the digital filters:

REGISTER ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

0010

Mode Control

0

MUT

0

Soft Mute select

0: Normal Operation

1: Soft mute both channels