 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
WM8720EDS/R 데이터시트(PDF) 6 Page - Wolfson Microelectronics plc |
|
|
|||||||||||||||||||||||||||||
WM8720EDS/R 데이터시트(HTML) 6 Page - Wolfson Microelectronics plc |
|
|
6 / 17 page  WM8720 Production Data w PD Rev 4.0 February 2005 6 BCKIN DIN LRCIN t BCH t BCL t BL t LB t BCY t DS t DH Figure 1 Audio Data Input Timing Test Conditions AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25 oC, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information BCKIN pulse cycle time tBCY 100 ns BCKIN pulse width high tBCH 40 ns BCKIN pulse width low tBCL 40 ns BCKIN rising edge to LRCIN edge tBL 20 ns LRCIN rising edge to BCKIN rising edge tLB 20 ns DIN setup time tDS 20 ns DIN hold time tDH 20 ns SCKI t SCKIL t SCKIH t SCKY Figure 2 System Clock Timing Requirements Test Conditions AVDD, DVDD = 5V, AGND, DGND = 0V, TA = +25 oC, fs = 48kHz, SCKI = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT System Clock Timing Information System clock pulse width high tSCKIH 10 ns System clock pulse width low tSCKIL 10 ns System clock cycle time tSCKY 27 ns |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
