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WM8729GED/V 데이터시트(PDF) 8 Page - Wolfson Microelectronics plc

부품명 WM8729GED/V
상세설명  24-bit, 192kHz Stereo DAC
PDF  18 Pages
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제조업체  WOLFSON [Wolfson Microelectronics plc]
홈페이지  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8729GED/V 데이터시트(HTML) 8 Page - Wolfson Microelectronics plc

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WM8729
Production Data
w
PD Rev 4.1 June 2006
8
MASTER CLOCK TIMING
MCLK
t
MCLKL
t
MCLKH
t
MCLKY
Figure 1 Master Clock Timing Requirements
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, DGND = 0V, TA = +25
oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
System Clock Timing Information
MCLK Master clock pulse width high
tMCLKH
13
ns
MCLK Master clock pulse width low
tMCLKL
13
ns
MCLK Master clock cycle time
tMCLKY
26
ns
MCLK Duty cycle
40:60
60:40
DIGITAL AUDIO INTERFACE
BCKIN
LRCIN
t
BCH
t
BCL
t
BCY
DIN
t
LRSU
t
DS
t
LRH
t
DH
Figure 2 Digital Audio Data Timing
Test Conditions
AVDD, DVDD = 5V, AGND = 0V, AGND, DGND = 0V, TA = +25
oC, fs = 48kHz, MCLK = 256fs unless otherwise stated.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCKIN cycle time
tBCY
40
ns
BCKIN pulse width high
tBCH
16
ns
BCKIN pulse width low
tBCL
16
ns
LRCIN set-up time to BCKIN rising
edge
tLRSU
8
ns
LRCIN hold time from BCKIN rising
edge
tLRH
8
ns
DIN set-up time to BCKIN rising
edge
tDS
8
ns
DIN hold time from BCKIN rising
edge
tDH
8
ns



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