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WM8728SEDS/R 데이터시트(PDF) 20 Page - Wolfson Microelectronics plc |
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WM8728SEDS/R 데이터시트(HTML) 20 Page - Wolfson Microelectronics plc |
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20 / 28 page ![]() WM8728 Production Data w PD Rev 4.2 April 2004 20 ATTENUATION CONTROL Each DAC channel can be attenuated digitally before being applied to the digital filter. Attenuation is 0dB by default but can be set between 0 and 127.5dB in 0.5dB steps using the 8 Attenuation control bits. All attenuation registers are double latched allowing new values to be pre-latched to both channels before being updated synchronously. Setting the UPDATE bit on any attenuation write will cause all pre-latched values to be immediately applied to the DAC channels. REGISTER ADDRESS BITS LABEL DEFAULT DESCRIPTION [7:0] LAT[7:0] 11111111 (0dB) Attenuation data for Left channel DACL in 0.5dB steps. 0000 Attenuation DACL 8 UPDATEL 0 Controls simultaneous update of all Attenuation Latches 0: Store DACL in intermediate latch (no change to output) 1: Store DACL and update attenuation on all channels. [7:0] RAT[7:0] 11111111 (0dB) Attenuation data for Right channel DACR in 0.5dB steps. 0001 Attenuation DACR 8 UPDATER 0 Controls simultaneous update of all Attenuation Latches 0: Store DACR in intermediate latch (no change to output) 1: Store DACR and update attenuation on all channels. Table 9 Attenuation Register Map Note: 1. The UPDATE bit is not latched. If UPDATE=0, the Attenuation value will be written to the pre-latch but not applied to the relevant DAC. If UPDATE=1, all pre-latched values and the current value being written will be applied on the next input sample. 2. Care should be used in reducing the attenuation as rapid large volume changes can introduce zipper noise. DAC OUTPUT ATTENUATION Registers LAT and RAT control the left and right channel attenuation. Table 9 shows how the attenuation levels are selected from the 8-bit words. XAT[7:0] ATTENUATION LEVEL 00(hex) ∞dB (mute) 01(hex) 127.5dB : : : : : : FE(hex) 0.5dB FF(hex) 0dB Table 10 Attenuation Control Levels MUTE MODES Setting the MUT register bit will apply a 'soft' mute to the input of the digital filters: REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0010 DAC Control 0 MUT 0 Soft Mute select 0 : Normal Operation 1: Soft mute all channels Table 11 Mute control |
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