AMC130M02DFMR datasheet(78/88 Pages) TI

78 / 88 page

9.3 Power Supply Recommendations

The AMC130M02 is powered from the low-side power supply (DVDD) with a nominal value of 3.3 V (or 5 V) ±

10%. Place a low-ESR decoupling capacitor of 1 nF (C15 in Figure 9-8) as close as possible to the DVDD pin,

followed by a 1-µF capacitor (C16) to filter this power-supply path.

The low-side power supply (DVDD) is the only external supply required to operate the AMC130M02. All internal

voltage supplies and secondary (high-side) supplies are generated by the integrated DC/DC converter and the

high-side LDO, such as the supply voltage at the output pins, DCDC_OUT and HLDO_OUT.

The primary-side of the DC/DC converter is decoupled with a low-ESR, 100-nF capacitor (C17) positioned close

to the device between the DCDC_CAP and DGND pins. Use a 1-µF capacitor (C6) to decouple the high-side in

addition to a low-ESR, 1-nF capacitor (C1) placed as close as possible to the device and connected between the

DCDC_OUT and DCDC_HGND pins.

For improved EMI performance, place a ferrite bead between the DCDC_OUT and HLDO_IN pins (F1) and the

DCDC_HGND and HGND pins (F2), respectively.

For the high-side LDO, use low-ESR capacitors of 1 nF (C11) placed as close as possible to the AMC130M02,

followed by a 100-nF decoupling capacitor (C13) between the HLDO_OUT and HGND pins.

The ground reference for the high-side (HGND) is derived from the terminal of the shunt resistor that is

connected to the negative input (AIN0N) of the device. For best DC accuracy, use a separate trace to make

this connection instead of shorting HGND to AIN0N directly at the device input.

DVDD

DCDC_OUT

DCDC_HGND

DCDC_CAP

DGND

HGND

GPO

AIN1P

Phase

Neutral

SCLK

DOUT

DIN

DRDY

SYNC/RESET

AIN0N

AIN1N

AIN0P

CLKIN

HLDO_OUT

ISO GND

HLDO_IN

Ferrite

GND

C15

1 nF

C16

1 µF

C17

100 nF

C11

1 nF

C13

100 nF

1 nF

1 µF

C10

1 nF

C24

100 nF

4.7 nF

49.9

Low side supply

3.0 V to 5.5 V

R19

100 k

R32

100 k

R18

100 k

R15

100 k

to uC

from uC

49.9

4.7 nF

from uC

Ferrite

Resonator and

Driver

LDO

Rectifier

Control &

Serial

Interface

1.2-V

Reference

ADC

–

Gain &

Offset

Calibration

Phase

Shift &

Digital

Filter

ADC

Gain &

Offset

Calibration

Phase

Shift &

Digital

Filter

–

Clock

Generation

Figure 9-8. Power Supply Decoupling the AMC130M02

Capacitors must provide adequate effective capacitance under the applicable DC bias conditions they

experience in the application. MLCC capacitors typically exhibit only a fraction of the nominal capacitance under

real-world conditions and this factor must be taken into consideration when selecting these capacitors. This

problem is especially acute in low-profile capacitors, in which the dielectric field strength is higher than in taller

components. Reputable capacitor manufacturers provide capacitance versus DC bias curves that greatly simplify

component selection.

Table 9-3 lists components suitable for use with the AMC130M02. This list is not exhaustive. Other components

can exist that are equally suitable (or better), however these listed components have been validated during the

development of the AMC130M02.

AMC130M02

SBASAN9 – SEPTEMBER 2023

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