M45PE80 datasheet(46/47 Pages) STMICROELECTRONICS

부품명	M45PE80

상세설명	8 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability and a 50 MHz SPI bus interface

PDF	47 Pages

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제조업체	STMICROELECTRONICS [STMicroelectronics]

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Revision history

M45PE80

46/47

14-Feb-2006

X process technology added (see Section 2.5: Reset (Reset), Table 14:

Reset timings for U process technology devices and Table 15: Reset

timings for X process technology devices). MLP package renamed as

VFQFPN8, MLP silhouette modified on page 1. TLEAD removed from

Table 7: Absolute maximum ratings.

Table 5: Status Register Format moved from Section 4.7: Status Register

to Section 6.4: Read Status Register (RDSR). Blank option removed

under Plating Technology in Table 20: Ordering information scheme.

15-Dec-2006

50 MHz frequency added, Table 14: AC characteristics (50 MHz

operation) added. Small text changes.

Section 2.5: Reset (Reset) updated. VCC supply voltage and VSS

ground descriptions added.

Figure 3: Bus master and memory devices on the SPI bus modified and

explanatory text added.

Behavior of WIP bit specified at Power-up in Section 7: Power-up and

Power-down.

VIO max modified and TLEAD added in Table 7: Absolute maximum

ratings.

Table 15: Reset conditions and Table 16: Timings after a Reset Low

pulse updated.

SO8N package added (T9HX technology only), SO8W and VFQFPN8

package specifications updated (see Section 11: Package mechanical).

Table 21.

Document revision history

Date

Version

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M45PE80 데이터시트(PDF) 46 Page - STMicroelectronics