2

AT25128/256

0872O–SEEPR–03/05

The AT25128/256 is enabled through the Chip Select pin (CS) and accessed via a 3-

wire interface consisting of Serial Data Input (SI), Serial Data Output (SO), and Serial

Clock (SCK). All programming cycles are completely self-timed, and no separate Erase

cycle is required before Write.

Block Write protection is enabled by programming the status register with top ¼, top ½

or entire array of write protection. Separate Program Enable and Program Disable

instructions are provided for additional data protection. Hardware data protection is pro-

vided via the WP pin to protect against inadvertent write attempts to the status register.

The HOLD pin may be used to suspend any serial communication without resetting the

serial sequence.

Figure 1. Block Diagram

Absolute Maximum Ratings*

Operating Temperature..................................–55

°C to +125°C

*NOTICE:

Stresses beyond those listed under “Absolute Maxi-

mum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional

operation of the device at these or any other condi-

tions beyond those indicated in the operational sec-

tions of this specification is not implied. Exposure to

absolute maximum rating conditions for extended

periods may affect device reliability.

Storage Temperature .....................................–65

°C to +150°C

Voltage on Any Pin

with Respect to Ground .................................... –1.0V to +7.0V

Maximum Operating Voltage .......................................... 6.25V

DC Output Current........................................................ 5.0 mA

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