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AD45335 데이터시트(PDF) 8 Page - Analog Devices

부품명 AD45335
상세설명  32-Channel, 14-Bit DAC with Full-Scale Output Voltage Programmable from 50 V to 200 V
PDF  16 Pages
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AD45335 데이터시트(HTML) 8 Page - Analog Devices

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Data Sheet
AD45335
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
analog.com
Rev. 0 | 8 of 16
Table 6. Pin Function Descriptions (Continued)
Pin No.
Mnemonic
Description
K1, K2
V+
V+ Amplifier Supply Pins.
K3 to K14
AGND
Analog GND Pins.
L1, L2
NC
No Connect. Do not connect to these pins.
L3 to L13
AGND
Analog GND Pins.
L14
DAC_GND
Reference GND Supply for All DACs.
M1 to M12
AGND
Analog GND Pins.
M13, M14
AVCC
Analog Supply Pins.
N1, N2
PGND
Output Amplifier Ground Reference Pins.
N3
CATHODE
Cathode of Internal Diode for Diode Temperature Measurement.
N4
ANODE
Anode of Internal Diode for Diode Temperature Measurement.
N5 to N14
AGND
Analog GND Pins.
P1
NC
No Connect. Do not connect to these pins.
P2
REF_IN
Reference Voltage for Channel 0 to Channel 31.
P3
DAC_GND
Reference GND Supply for All DACs.
P4
RESET
Active Low Input. This pin can also be used to reset the complete device to its power-on reset conditions.
Zero code is loaded to the DACs.
P5
DVCC
Digital Supply Pins.
P6
DGND
Digital GND Pins.
P7
TEST
For normal operation, tie this pin low.
P8
DIN
Serial Data Input. Data must be valid upon the falling edge of SCLK.
P9
SCLK
Serial Clock Input. Data is clocked into the shift register upon the falling edge of SCLK. The pin operates
at clock speeds of up to 30 MHz. Internal pull-up device on logic input. Therefore, it can be left floating
and defaults to a logic high condition.
P10
SYNC
Active Low Input. This is the frame synchronization signal for the serial interface. While SYNC is low, data
is transferred in upon the falling edge of SCLK.
P11 to P13
AGND
Analog GND Pins.
P14
NC
No Connect. Do not connect to these pins.



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